The present invention relates generally to power supply apparatus and more particularly to a chopper circuit for controlling the amount of power delivered to a DC load from a DC source.
Chopper circuits are typically utilized to control the speed of a DC motor by controlling the power delivered thereto from a DC source, such as a battery. Prior chopper circuits have utilized a silicon controlled rectifier, or SCR, connected in series between the DC source and the motor. The SCR is gated into conduction by control pulses which are generated as a function of the commanded speed of the motor.
While such a system is effective to control the speed of the motor, such a system requires bulky and expensive commutation circuits to insure that the SCR is commutated off at appropriate times to accurately control the power delivered to the motor.
Another chopper known in the prior art is disclosed in Marumoto et al U.S. Pat. No. 4,211,961. This chopper utilizes a plurality of parallel-connected transistors coupled in series between a DC source and a motor. Each transistor is gated into conduction at appropriate times to control the power delivered to the motor.
While the Marumoto et al system eliminates the need for the bulky and expensive commutation circuitry noted above, it has been found that this system can be utilized only in low to medium power applications where the voltage developed by the DC source does not exceed the maximum rated voltage of the transistors. At the present time, commercially available power transistors have voltage ratings on the order of 450 volts. This system cannot, therefore, be utilized to control the speed of relatively large DC loads energized by high voltage sources of potential.